Sundance Catalog Sundance TV Cables SMT 348 Manuel d'utilisateur Page 3

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Table of Contents
1 Introduction ................................................................................................................ 6
2 Related Documents..................................................................................................... 7
2.1 Referenced Documents .............................................................................................7
2.2 Applicable Documents ..............................................................................................7
3 Acronyms, Abbreviations and Definitions ................................................................. 8
3.1 Acronyms and Abbreviations ...................................................................................8
3.2 Definitions .................................................................................................................8
4 Functional Description ............................................................................................... 9
4.1 Block Diagram...........................................................................................................9
4.2 Module Description.................................................................................................10
4.2.1 FPGA...................................................................................................................10
4.2.2 CPLD...................................................................................................................10
4.2.3 FLASH MEMORY..............................................................................................10
4.2.4 JTAG Header......................................................................................................10
4.2.5 FPGA Configuration schemes............................................................................11
4.2.6 FPGA Reset Scheme...........................................................................................12
4.2.7 FPGA Bitstream formatting ..............................................................................13
4.2.8 QDR2 SRAM.......................................................................................................14
4.2.9 Sundance High speed Bus .................................................................................15
4.2.10 Sundance Low voltage Bus ................................................................................15
4.2.11 TIM Connectors..................................................................................................16
4.2.12 DIP Switches ......................................................................................................16
4.2.13 Clocking scheme .................................................................................................17
4.2.14 LEDs ...................................................................................................................17
4.2.15 Performance........................................................................................................17
4.3 Interface Description ..............................................................................................17
4.3.1 Power Budget .....................................................................................................17
5 Footprint ....................................................................................................................22
5.1 Top View..................................................................................................................22
5.2 Bottom View............................................................................................................23
6 Pinout.........................................................................................................................24
6.1 FPGA Pin allocation by bank .................................................................................24
6.2 SHB..........................................................................................................................24
6.3 SLB ..........................................................................................................................24
6.4 JTAG........................................................................................................................25
User Manual SMT348 Page 3 of 29 Last Edited: 29/02/2008 17:52:00
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