Sundance Catalog Sundance TV Cables SMT 348 Manuel d'utilisateur télécharger pdf (Page 10)

4.2 Module Description

• Block1 and Block6 Xilinx Virtex 4 XC4VSX55/LX160 and configuration scheme.

• Block2: QDR2 SRAM memory.

• Block3: IO connectors for general purpose or dedicated interfaces.

• Block4: 50MHz or 200MHz local clocks, and external clock input.

• Block5: LEDs for development and in-use monitoring and general purpose use.

4.2.1 FPGA

Xilinx Virtex 4 XC4VSX55FF1148 or XC4VLX160FF1148 FPGA.

This device is packaged in a 1148-pin BGA package.

4.2.2 CPLD

Xilinx Coolrunner II device XC2C256-6CP132C. This device is packaged in a 132-ball BGA

type package with a -6 speed grade.

It can be used to configure the FGPA via Comport 3, or from a configuration stored in flash

memory.

The flash memory is programmed using the CPLD and data via the ComPort3.

4.2.3 FLASH MEMORY

S29GL256N11TFI01 is a 256Mbit flash from Spansion

It can be used to configure the FPGA at power up.

Flash accessed using Comport3 via the CPLD.

Flash programming selection via switch SW1 (See Table 3)

Software Library Support available from Sundance.

The code can run on Sundance DSP TIM or a Host.

All the flash functionalities are available.

4.2.4 JTAG Header

The JTAG header is compatible with Xilinx Parallel-IV cable signals.

It supports code download (for the FPGA), FPGA configuration, Hardware and Software

Debugging tools for the Virtex-4.

This cable connects the parallel port of an engineer's Workstation/PC to the JTAG chain of the

SMT348 Module.

All the Xilinx devices from block1 are chained and accessible via this JTAG header.

User Manual SMT348 Page 10 of 29 Last Edited: 29/02/2008 17:52:00

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Sundance Catalog Sundance TV Cables SMT 348 Manuel d'utilisateur Page 10